Microelectronics 2
Manufacturing processes and CAD in microelectronics
content
- Manufacturing value chain (wafer process, assembly, testing)
- Individual process steps, housing, analog testing, alignment
- Level of abstraction in microelectronics (physical, symbol, function), Y-tree
- Design flow, design styles
- Tools for the design of integrated circuits, integration of tools
- Circuit simulation (principle, numerics, analyses incl. sensitivity, WC, Monte Carlo and stability analysis)
- Logic simulation (higher level language, event-driven, delay)
- Verilog hardware description language
- Logic optimization (Karnaugh diagram, technology mapping), test of digital circuits, design for testability, test patterns, auto test
- Layout: Floorplanning, Polygons, Pcell/Cells, Generators, Design Rules, Constraints
- Parasitics, Backannotation, Matching, Placement and Wiring, OPC
registration
Please register at the following link if you would like to attend the event:https://bit.ly/3JeD1L8
Tutorial
In the exercise, the tasks are presented by students, and a list is drawn up at the beginning of the semester.
lecture materials
[Translate to Englisch:]
Here, you can find the lecture materials Vorlesungsmaterial